At its 2024 North American Technology Forum, TSMC unveiled its latest process technologies, continuing to integrate System on Integrated Chips (SoIC) under its core CoWoS technology. By 2025, TSMC aims to complete the preliminary validation of silicon photonics for supporting small pluggable COUPE connectors, which, combined with CoWoS packaging, will form Co-Packaged Optics (CPO). This marks a revolutionary key technology in advanced packaging for AI.

 

Silicon Photonics technology replaces electrons with photons to transmit signals on silicon chips, integrating multiple optical components into a single Photonic Integrated Circuit (PIC). This technology uses optical waveguide components instead of traditional copper wires as the channels for transmitting photons. According to data from the International Semiconductor Industry Association (SEMI), the global silicon photonics market is projected to grow from $12.6 billion in 2022 to $78.6 billion by 2030, with a compound annual growth rate (CAGR) of 25.7%. As the AI and HPC markets develop and computational performance increases, the demand for high-speed transmission is also driven up, leading to the emergence of Co-Packaged Optics (CPO) technology. CPO integrates optical and electronic chips within the same package, thereby shortening the distance between components and reducing signal loss during photon transmission.

 

Semiconductor manufacturers are leveraging advanced packaging technologies to enhance silicon photonics integration. TSMC is utilizing CoWoS technology to package silicon photonics as Co-Packaged Optics (CPO), with mass production expected to begin in 2025. Intel has invested several years in silicon photonics R&D, employing hybrid laser technology to achieve coupling efficiency over 90%, and offers comprehensive silicon photonics solutions. ASE Technology, on the other hand, integrates ASIC and silicon photonics on the same substrate using 2.5D packaging technology, effectively reducing power consumption by 30% to 35% while also supporting CPO applications. The development of silicon photonics technology is also influencing PCB design. As the industry progresses to the CPO stage, it is anticipated that substrate areas will need to expand to accommodate silicon photonics packaging requirements. Concurrently, trends such as component integration and the miniaturization of optical modules are expected to drive PCB designs towards smaller areas or simplified layouts. Overall, the advancement of silicon photonics and CPO technology is set to promote the high-value progression of the PCB industry.